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    FX101

ETC
Part No. FX101
OCR Text ...l components outside the dotted line box are user supplied components. This is just one possbile configuration of the FX-101. For additional...Locked For FX-101 with PECL output Place Connector in the "0" position for Enable "1" position Disab...
Description Frequency Translator

File Size 540.84K  /  12 Page

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    VSC8163 VSC8163QR

Vitesse Semiconductor Corporation
Part No. VSC8163 VSC8163QR
OCR Text ...gned to drive a 50 transmission line. The transmission line can be DC terminated with a split-end termination scheme (see Figure 3), or DC t...locked to reference clock. Minimum 5 CLK16 cycles (32ns) FIFO Mode Operation Transparent Mode Opera...
Description OC-48 16:1 SONET/SDH MUX with Clock Generator

File Size 190.15K  /  20 Page

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    TZA1032UK

NXP Semiconductors
Part No. TZA1032UK
OCR Text ...nterrupt service request output line to the microprocessor. this line is set (made low) by internal laser driver events and is cleared (made...locked loop the pll is phase locked to the incoming rlc clock signal. a single external clock signal...
Description Laser driver and controller circuit

File Size 100.09K  /  24 Page

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    VSC8140 VSC8140QR VSC8140TW

Vitesse Semiconductor Corporation
Part No. VSC8140 VSC8140QR VSC8140TW
OCR Text ...gned to drive a 50 transmission line. The transmission line can be DC terminated with a split-end termination scheme (see Figure 3), or DC t...locked to reference clock. Minimum 5 CLK16 cycles FIFO Mode Operation Transparent Mode Operation ...
Description 2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator

File Size 367.39K  /  34 Page

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    ADV7189B ADV7189BBSTZ

Analog Devices
Part No. ADV7189B ADV7189BBSTZ
OCR Text ...ed from a single 27 MHz crystal line-locked clock-compatible (LLC) Adaptive-Digital-Line-Length-Tracking (ADLLTTM), signal processing, and enhanced FIFO management give mini TBC functionality 5-line adaptive comb filters Proprietary archite...
Description High Performance 12-bit Video Decoder with Noise Shaped Video® ADCs

File Size 850.23K  /  97 Page

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    Philips
Part No. SAA7108E/V1 SAA7109E/V1
OCR Text ...ntrol on-chip clock generator line-locked system clock frequencies digital pll for horizontal sync processing and clock generation, horizontal and vertical sync detection requires only one crystal (either 24.576 mhz or 32.11 mhz) for al...
Description SAA7108E; SAA7109E; PC-CODEC

File Size 932.93K  /  202 Page

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    ADV7185

Analog Devices, Inc.
Part No. ADV7185
OCR Text ...al dual video clocking schemes: line-locked clock compatible (llc) adaptive digital line length tracking (adllt?) 3-line chroma comb filter real-time clock and status information output integrated agc (automatic gain control) and clamping m...
Description Advanced NTSC/PAL Video Decoder featuring 12-bit ADCs
Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output

File Size 728.41K  /  40 Page

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    TDA9150 TDA9150B

NXP Semiconductors
Part No. TDA9150 TDA9150B
OCR Text ... standards. the tda9150b uses a line-locked clock at 6.75, 13.5 or 27 mhz, depending on the line frequency and application, and requires only a few external components. the device is self-adaptive for a number of functions and is fully prog...
Description Programmable deflection controller

File Size 280.69K  /  36 Page

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    STV2110A

STMicroelectronics
Part No. STV2110A
OCR Text ...TURATION CERAMIC 500kHz VCO FOR LINE DEFLECTION CHROMA STANDARD AUTOMATIC IDENTIFICATION BIDIRECTIONAL I/O FOR CHROMA STANDARD PHASE-LOCKED REFERENCE OSCILLATOR USING A STANDARD 4.43MHz OSD CAPABILITY ON OUTPUTS VIDEO IDENTIFICATION GENERAT...
Description PAL-SECAM LUMA-CHROMA & DEFLECTION PROCESSOR

File Size 377.00K  /  15 Page

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