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  jitter Datasheet PDF File

For jitter Found Datasheets File :: 25280    Search Time::1.422ms    
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    MT907405 MT9074APR MT9074APR1

Zarlink Semiconductor, Inc.
Zarlink Semiconductor Inc
Part No. MT907405 MT9074APR MT9074APR1
OCR Text ...ugh transmit slip buffer ? low jitter dpll for clock generation ? enhanced alarms, performance monitoring and error insertion functions ? intel or motorola non-multiplexed parallel microprocessor interface ? st-bus 2.048 mbit/s backplane...
Description T1/E1/J1 Single Chip Transceiver DATACOM, FRAMER, PQCC68

File Size 1,127.82K  /  151 Page

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    NBXSBA020LNHTAG NBXSBB020LN1TAG NBXSBA020LN1TAG

ON Semiconductor
Part No. NBXSBA020LNHTAG NBXSBB020LN1TAG NBXSBA020LN1TAG
OCR Text ...r to provide 280 mhz, ultra low jitter and phase noise lvpecl differential output. this device is a member of on semiconductor?s pureedge clock family that provides accurate and precision clock solutions. available in 5 mm x 7 mm smd (cl...
Description 3.3 V, 280 MHz LVPECL Clock Oscillator
3.3 V, 280 MHz PureEdge&#8482; LVPECL Clock Oscillator Module 280 MHz, OTHER CLOCK GENERATOR, CDSO6

File Size 116.59K  /  7 Page

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    ASFLMB-BLANK

Abracon Corporation
Part No. ASFLMB-BLANK
OCR Text ....5 x 0.85 mm (available for low jitter, 1st and 2nd ge neration mems) - 5.0 x 3.2 x 0.85 mm(available for low jitter, 1st and 2nd gen eration mems) - 7.0 x 5.0 x 0.85 mm(available for low jitter, 1st and 2nd gen eration mems) programmer for...
Description Programmer for PureSilicon Oscillators

File Size 1,744.22K  /  2 Page

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    XRT86SH32807

Exar Corporation
Part No. XRT86SH32807
OCR Text ...ak algorithm. this removes the jitter due to mapping and pointer adjustments from the t1 or e1 signals that are de-mapped from the incoming sonet/sdh data- stream. these de-synchronizer circuits do not need any external clock reference...
Description 28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET

File Size 2,157.27K  /  339 Page

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    HMC727LC3C

Hittite Microwave Corporation
Hittite Microwave Corpo...
Part No. HMC727LC3C
OCR Text ... frequency <14 ghz 10 db random jitter jr rms 0.2 ps rms deterministic jitter, jd peak-to-peak, 2 15 -1 prbs input [1] 2 ps, p-p propagation delay clock to data, td 105 ps clock phase margin 13 ghz 320 deg set up & hold time, t sh 6 ps [1]...
Description 14 Gbps, FAST RISE TIME D-TYPE FLIP-FLOP

File Size 338.25K  /  8 Page

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    HMC720LC3C

Hittite Microwave Corporation
Part No. HMC720LC3C
OCR Text ... small signal gain 27 db random jitter j r rms 0.2 ps rms deterministic jitter, j d - , 2 15 -1 prbs input [1] 26ps propagation delay, td 120 ps d1 to d2 data skew, t skew 0ps vr pin current vr = 0.0 v 2 ma vr pin current vr = +0.4 v ...
Description 14 Gbps, FAST RISE TIME 1:2 FANOUT BUFFER w/ PROGRAMMABLE OUTPUT VOLTAGE

File Size 470.41K  /  8 Page

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    AD781 AD781AN AD781JN AD781SQ AD781SQ/883B

Analog Devices, Inc.
AD[Analog Devices]
Part No. AD781 AD781AN AD781JN AD781SQ AD781SQ/883B
OCR Text ...ortion: -80 dB Maximum Aperture jitter: 75 ps Maximum Internal Hold Capacitor Self-Correcting Architecture 8-Pin Mini Cerdip and Plastic Package MIL-STD-883 Compliant Versions Available Complete 700 ns Sample-and-Hold Amplifier AD781* F...
Description ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0
Complete 700 ns Sample-and-Hold Amplifier
High speed, monolithic SHA with a max acquisition time for 700 ns to 0.01% over temperature.

File Size 147.64K  /  8 Page

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    AK8181E

Asahi Kasei Microsystems
Part No. AK8181E
OCR Text ...typical ) add itive phase jitter(rms): pclkp/n@156.25mhz : 0.04 ps (typical) xtal@50mhz : 0.14ps (typ ical ) operating temper ature range: - 4 0 to +85 package: 20 - pin tssop (pb free) pin compa...
Description 3.3V LVPECL 1:4 Clock Fanout Buffer

File Size 495.94K  /  10 Page

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    AD9852 AD9852ASQ AD9852AST AD9852_PCB

AD[Analog Devices]
Part No. AD9852 AD9852ASQ AD9852AST AD9852_PCB
OCR Text jitter Comparator Excellent Dynamic Performance: 80 dB SFDR @ 100 MHz ( 1 MHz) AOUT 4 to 20 Programmable Reference Clock Multiplier Dual 48-Bit Programmable Frequency Registers Dual 14-Bit Programmable Phase Offset Registers 12-Bit Amplitud...
Description CMOS 300 MHz Complete-DDS

File Size 424.37K  /  42 Page

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