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For fir Found Datasheets File :: 1925 Search Time::3.437ms
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				AD[Analog Devices]
Part No.	AD9761 AD9761ARS AD9761-EB
OCR Text	...polation Filters: Dual matching fir interpolation filters with 62.5 dB stop band rejection precede each DAC input thus reducing the DACs' reconstruction filter requirements. 3. Low Power: Complete CMOS Dual DAC function operates on a low 20...
Description	Dual 10-Bit TxDAC ⑩ with 2x Interpolation Filters Dual 10-Bit TxDAC with 2x Interpolation Filters
File Size	246.63K / 23 Page	View it Online	Download Datasheet

				http:// LINER[Linear Technology] Linear Technology Corporation
Part No.	LT1328 LT1328CMS8 LT1328CS8 1328F
OCR Text	...rared Data Association. SIR, fir and 4ppm Compatible Low Frequency Ambient Rejection Loop Supply Current: 2mA 8-Lead MSOP and SO Packages 5V Single Supply Operation Optional High Frequency Noise Rejection APPLICATIONS s s s s s s s s...
Description	From old datasheet system 4Mbps IrDA Infrared Receiver Octal D-Type Transparent Latches With 3-State Outputs 20-SOIC 0 to 70 FASTENERS, TIES CABLE
File Size	273.58K / 12 Page	View it Online	Download Datasheet

				Vishay Siliconix
Part No.	TFDU610309
OCR Text	...st infrared transceiver module (fir, 4 mbit/s) for 2.4 v to 5.5 v operation tfdu6103 vishay semiconductors description the tfdu6103 is a low-power infrared transceiver module compliant to the latest irda ? physical layer standard for fas...
Description	Fast Infrared Transceiver Module (fir, 4 Mbit/s) for 2.4 V to 5.5 V Operation
File Size	234.13K / 13 Page	View it Online	Download Datasheet

				Motorola, Inc Motorola Mobility Holdings, Inc.
Part No.	MC145074D MC145074
OCR Text	...sigmadelta modulators with 2tap fir feedback architecture. the part can be used as a stand alone stereo digital modulator, or as a companion part to the mc145076 smoothing filter to achieve high quality, low cost audio performance. ? peak s...
Description	Stero Audio Sigma-Delta Digital-to-Analog Converter Simple -48V Hot Swap Controller with Enable 8-MSOP -40 to 85 PARALLEL, WORD INPUT LOADING, 20-BIT DAC, PDSO16
File Size	182.98K / 14 Page	View it Online	Download Datasheet

				Analog Devices
Part No.	AD1896 AD1896YRS AD1896YRSRL
OCR Text	...to -133 dB THD + N Linear Phase fir Filter Hardware Controllable Soft Mute Supports 256 fS, 512 fS or 768 fS Master Mode Clock Flexible Three-Wire Serial Data Port with Left-Justified, I2S, Right-Justified (16-,18-, 20-, 24-Bits), and TDM S...
Description	192 kHz Stereo Asynchronous Sample Rate Converter
File Size	1,290.17K / 24 Page	View it Online	Download Datasheet

				NXP Semiconductors
Part No.	SAA3323H SAA3323GP
OCR Text	...10-tap finite impulse-response (fir) filter per main data channel, with 8 bit coefficients, identical for all main channels 10-tap fir filter for the aux channel analog and digital eye outputs interrupt line triggered by internal auxilia...
Description	Drive processor for DCC systems
File Size	274.07K / 56 Page	View it Online	Download Datasheet

				Analog Devices
Part No.	AD6649 AD6649BCPZ AD6649BCPZRL7 AD6649EBZ
OCR Text	...th fixed-frequency nco, 95 mhz fir filter 1.8 v supply voltages lvds (ansi-644 levels) outputs integer 1-to-8 input clock divider (625 mhz maximum input) integrated dual-channel adc sample rates of up to 250 msps if sampling frequenc...
Description	IF Diversity Receiver IF sampling frequencies to 400 MHz
File Size	1,043.39K / 40 Page	View it Online	Download Datasheet

				Vishay Siliconix VISHAY SEMICONDUCTORS
Part No.	TFBS4652-TR1 TFBS4652-TR3 TFBS465209
OCR Text	... mir: 576 kbit/s to 1152 kbit/s fir: 4 mbit/s vfir: 16 mbit/s mir and fir were implemented with irphy 1.1, followed by irphy 1.2, adding the sir low power standard. irphy 1.3 extended the low power option to mir and fir and vfir was added ...
Description	Infrared Transceiver, 9.6 kbit/s to 115.2 kbit/s (SIR) SPECIALTY INTERFACE CIRCUIT, SMA7
File Size	223.94K / 11 Page	View it Online	Download Datasheet

				Integrated Device Technology
Part No.	DAC1208D650 DAC1208D650HN
OCR Text	...bit offset control aux. dac 2 fir 2 2 fir 1 multi-dac synchronization 2 fir 2 2 fir 3 2 fir 3 2 fir 1 clock generator unit vin_p3 vin_n3 digital layer processing jesd204a spi control registers sdo sdio scs_n sclk clkinp clkinn m...
Description	Dual 12-bit DAC; up to 650 Msps; 2? 4?or 8?interpolating with JESD204A interface
File Size	574.11K / 96 Page	View it Online	Download Datasheet

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