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SamHop Microelectronics...
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| Part No. |
STT04N20
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| OCR Text |
...60 270 180 90 0 10 15 20 0 5 25 30 10 8 6 4 2 0 1 v ds =100v i d =0.5a 8 6 4 2 75 c 0.5 3.5 3.0 2.5 25 c 125 c 6 5 4 3 2 1 0 10 s 1s 100ms 1 0 ms 1 ms r d s (o n ) lim i t v gs =10v single pulse t c =25 c dc
stt04n20 www.samhop.com.tw nov... |
| Description |
Super high dense cell design for low RDS(ON). N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
123.46K /
7 Page |
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it Online |
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SamHop Microelectronics...
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| Part No. |
STT03N20
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| OCR Text |
...00 240 180 120 60 0 10 15 20 25 30 0 5 10 8 6 4 2 0 v ds =100v i d =0.35a 110 100 1 10 100 vds=100v,id=0.35a vgs=10v td(on) tr td(off ) tf 2 468 125 c 0 1 2 3 45 67 8 dc 10s 1s 10 0ms 10ms r ds ( o n) limit v gs =10v single pulse t a =25 ... |
| Description |
Super high dense cell design for low RDS(ON). N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
125.52K /
8 Page |
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it Online |
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SamHop Microelectronics...
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| Part No. |
STT03N10
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| OCR Text |
...00 240 180 120 60 0 10 15 20 25 30 0 5 ciss dc 10 s 1s 100m s 10ms r ds (o n) limit v ds =50v,i d =1a v gs =10v td(on) tr td(off ) tf
t p v (br )dss i as f igure 13a. figure 13b. u nc l am p ed s in d u ct i ve t e t ci r c u i t o fr ... |
| Description |
Super high dense cell design for low RDS(ON). N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
132.72K /
8 Page |
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it Online |
Download Datasheet
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SamHop Microelectronics...
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| Part No. |
STT03L06
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| OCR Text |
...0 480 360 240 120 0 10 15 20 25 30 0 5 10 8 6 4 2 0 v ds =50v i d =1.5a 110 100 1 10 100 100 vds=50v,id=1a vgs=10v td(on) tr td(off ) tf 2 468 125 c 0 1 2 3 45 67 8 r ds ( on) limi t v gs =10v single pulse t a =25 c
t p v (br )dss i as ... |
| Description |
Super high dense cell design for low RDS(ON). N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
133.05K /
8 Page |
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it Online |
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SamHop Microelectronics...
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| Part No. |
STT03L03
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| OCR Text |
30 v v 20 gate-source voltage drain-source voltage product summary v dss i d r ds(on) (m ) max 30v 3a 149 @ vgs=4.5v 104 @ vgs=10v...ohm total gate charge rise time turn-off delay time fall time turn-on delay time m ohm v gs =10v , ... |
| Description |
Super high dense cell design for low RDS(ON). N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
132.70K /
8 Page |
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it Online |
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SamHop Microelectronics...
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| Part No. |
STT02N20
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| OCR Text |
...50 200 150 100 50 0 10 15 20 25 30 0 5 ciss v ds =100v,i d =0.7a v gs =10v td(on) tr td(off ) tf v gs =10v single pulse t a =25 c dc 10s 1 s 100ms 10ms r d s (on) lim it
t p v (br )dss i as f igure 13a. figure 13b. u nc l am p ed s in ... |
| Description |
Super high dense cell design for low RDS(ON). N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
132.69K /
8 Page |
View
it Online |
Download Datasheet
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SamHop Microelectronics
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| Part No. |
STT02N10
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| OCR Text |
...200 160 120 80 40 0 10 15 20 25 30 0 5 ciss dc 10s 1 s 10 0 ms 10ms r d s (on) lim it v ds =50v,i d =1a v gs =10v td(on) tr td(off ) tf
t p v (br )dss i as f igure 13a. figure 13b. u nc l am p ed s in d u ct i ve t e t ci r c u i t o ... |
| Description |
N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
132.77K /
8 Page |
View
it Online |
Download Datasheet
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SamHop Microelectronics...
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| Part No. |
STT01L10
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| OCR Text |
...0 400 300 200 100 0 10 15 20 25 30 0 5 10 8 6 4 2 0 110 100 1 10 100 vds=50v,id=0.75a vgs=10v td(on) tr td(off ) tf 2 468 125 c 0 3 8 r d s (on) li m i t v ds =50v i d =0.75a 12 4567 v gs =10v single pulse t a =25 c
stt01l10 www.samhop... |
| Description |
Super high dense cell design for low RDS(ON). N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
124.49K /
8 Page |
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it Online |
Download Datasheet
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SamHop Microelectronics...
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| Part No. |
STT01L07
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| OCR Text |
... c rss 14 pf q g 16.5 nc 13 195 30 t d(on) 3.6 ns t r ns t d(off) ns t f ns v ds =25v,v gs =0v switching characteristics v dd =35v i d =0.75a v gs =10v r gen = 6 ohm total gate charge rise time turn-off delay time fall time turn-on delay ... |
| Description |
Super high dense cell design for low RDS(ON). N-Channel Logic Level Enhancement Mode Field Effect Transistor
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| File Size |
131.92K /
8 Page |
View
it Online |
Download Datasheet
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