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INTERSIL[Intersil Corporation]
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| Part No. |
HCTS540MS HCTS540 HCTS540D HCTS540DMSR HCTS540HMSR HCTS540K HCTS540KMSR
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| OCR Text |
... pins (OE1 and OE2) control the threestate outputs. If either enable is high the outputs will be in the high impedance state. For data output both enables (OE1 and OE2) must be low. The HCTS540MS utilizes advanced CMOS/SOS technology to ach... |
| Description |
Radiation Hardened Inverting Octal Buffer/Line Driver, Three-State
Quadruple 2-Input Positive-NOR Gates 20-LCCC -55 to 125
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| File Size |
134.61K /
10 Page |
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Cypress
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| Part No. |
CY7C425 CY7C419 7C419
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| OCR Text |
...T MR EF XO/HF Q 7 Q 6 C420-2
THREESTATE BUFFERS DATA OUTPUTS (Q0-Q 8) R READ CONTROL FLAG LOGIC RESET LOGIC MR FL/RT
TQFP Top View
D3 D8 W VCC D4 D2
EF FF
32 3130 29 28 27 26 25 D1 D0 NC NC XI FF Q0 Q1 1 2 3 4 5 6 7 8 24 23 22 ... |
| Description |
256/512/1K/2K/4K x 9 Asynchronous FIFO
From old datasheet system
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| File Size |
350.41K /
21 Page |
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it Online |
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STMicro
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| Part No. |
M48T512V M48T512Y 5747
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| OCR Text |
...(tGLQV). The state of the eight threestate Data I/O signals is controlled by E and G. If the outputs are activated before tAVQV, the data lines will be driven to an indeterminate state until tAVQV. If the Address Inputs are changed while E ... |
| Description |
3.3V-5V 4 Mbit (512Kb x 8) TIMEKEEPER ? SRAM
From old datasheet system
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| File Size |
112.41K /
14 Page |
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it Online |
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IDT[Integrated Device Technology]
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| Part No. |
IDT7202LA IDT7201LA 7200-7202_DS IDT7200L IDT7202
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| OCR Text |
...POINTER
R
READ CONTROL
THREESTATE BUFFERS DATA OUTPUTS (Q0-Q8)
RS RESET LOGIC FL/RT
FLAG LOGIC EXPANSION LOGIC
EF FF
XI
XO/HF
2679 drw 01
IDT and the IDT logo are registered trademarks of Integrated Device Tech... |
| Description |
CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9 and 1,024 x 9
From old datasheet system
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| File Size |
131.90K /
14 Page |
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it Online |
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Infineon
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| Part No. |
SAF82525 SAB82525
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| OCR Text |
...ata bus lines are bidirectional threestate lines which interface with the system's data bus. These lines carry data and command/status to and from the HSCX.
I
Read, Intel bus mode, IM1 connected to low This signal indicates a read ope... |
| Description |
High-Level Serial Communications Controller Extended (HSCX)
From old datasheet system
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| File Size |
3,233.27K /
121 Page |
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it Online |
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Intersil
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| Part No. |
CDP1852C3 CDP1852C CDP18523 CDP1852 FN1694
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| OCR Text |
... 18 20 22 RESET CLOCK
ENABLE THREESTATE OUTPUT DRIVERS
8-BIT DATA REGISTER
4 6 8 10 15 17 19 21
DO0 DO1 DO2 DO3 DO4 DO5 DO6 DO7
POLARITY DEPENDS ON MODE MODE = 1 MODE = 0 P1 P23 CSI SR CSI SR
FIGURE 1.
CS2 13 CSI/CSI 1 S... |
| Description |
High-Reliability Byte-Wide Input/Output Port
From old datasheet system
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| File Size |
49.94K /
7 Page |
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it Online |
Download Datasheet |
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