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GSI Technology, Inc.
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| Part No. |
GS8160ZV18CT-333I GS8160ZV36CGT-333I GS8160ZV18CGT-333I GS8160ZV36CT-333I GS8160ZV36CGT-300 GS8160ZV36CGT-250 GS8160ZV36CT-250I
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operati ons must be initiated with the advance/load pin (adv) held low, in order to load the new address. device activation is accomplished... |
| Description |
18Mb Pipelined and Flow Through Synchronous NBT SRAM 1M X 18 ZBT SRAM, 4.5 ns, PQFP100 18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 4.5 ns, PQFP100 18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 5 ns, PQFP100 18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 5.5 ns, PQFP100
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| File Size |
438.25K /
22 Page |
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it Online |
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GSI Technology, Inc.
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| Part No. |
GS8162Z18BB-200IV GS8162Z18BB-150IV GS8162Z18BGB-250IV GS8162Z36BGB-250V GS8162Z18BGB-200V GS8162Z36BD-200IV GS8162Z36BGB-200IV GS8162Z36BB-150IV GS8162Z36BB-250IV
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operat ions must be initiated with the advance/ load pin (adv) held low, in order to load the new address. device activation is accomplishe... |
| Description |
18Mb Pipelined and Flow Through Synchronous NBT SRAM 1M X 18 ZBT SRAM, 6.5 ns, PBGA119 18Mb Pipelined and Flow Through Synchronous NBT SRAM 1M X 18 ZBT SRAM, 7.5 ns, PBGA119 18Mb Pipelined and Flow Through Synchronous NBT SRAM 1M X 18 ZBT SRAM, 5.5 ns, PBGA119 18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 5.5 ns, PBGA119 18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 6.5 ns, PBGA165 18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 6.5 ns, PBGA119 18Mb Pipelined and Flow Through Synchronous NBT SRAM 512K X 36 ZBT SRAM, 7.5 ns, PBGA119
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| File Size |
800.02K /
33 Page |
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it Online |
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GSI Technology, Inc.
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| Part No. |
GS8162Z72CC-150V GS8162Z72CC-150IV GS8162Z72CGC-200V GS8162Z72CC-200IV
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operat ions must be initiated with the advance/ load pin (adv) held low, in order to load the new address. device activation is accomplishe... |
| Description |
18Mb Pipelined and Flow Through Synchronous NBT SRAM 256K X 72 ZBT SRAM, 7.5 ns, PBGA209 18Mb Pipelined and Flow Through Synchronous NBT SRAM 256K X 72 ZBT SRAM, 6.5 ns, PBGA209
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| File Size |
765.31K /
27 Page |
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it Online |
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GSI Technology, Inc.
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| Part No. |
GS8162Z72CC-250 GS8162Z72CC-150 GS8162Z72CC-150I GS8162Z72CC-200 GS8162Z72CGC-250I
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operati ons must be initiated with the advance/load pin (adv) held low, in order to load the new address. device activation is accomplished... |
| Description |
18Mb Pipelined and Flow Through Synchronous NBT SRAM 256K X 72 ZBT SRAM, 5.5 ns, PBGA209 18Mb Pipelined and Flow Through Synchronous NBT SRAM 256K X 72 ZBT SRAM, 7.5 ns, PBGA209 18Mb Pipelined and Flow Through Synchronous NBT SRAM 256K X 72 ZBT SRAM, 6.5 ns, PBGA209
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| File Size |
598.66K /
29 Page |
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it Online |
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GSI Technology, Inc.
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| Part No. |
GS8320Z36T-166T
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operat ions must be initiated with the advance/ load pin (adv) held low, in order to load the new address. device activation is accomplishe... |
| Description |
1M X 36 ZBT SRAM, 8 ns, PQFP100 TQFP-100
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| File Size |
464.86K /
23 Page |
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it Online |
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GSI Technology, Inc.
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| Part No. |
GS840Z18AT-180I GS840Z18AGT-180I GS840Z18AGT-150I
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operat ions must be initiated with the advance/ load pin (adv) held low, in order to load the new address. device activation is accomplishe... |
| Description |
4Mb Pipelined and Flow Through Synchronous NBT SRAMs 256K X 18 ZBT SRAM, 8 ns, PQFP100 4Mb Pipelined and Flow Through Synchronous NBT SRAMs 256K X 18 ZBT SRAM, 10 ns, PQFP100
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| File Size |
437.07K /
23 Page |
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it Online |
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GSI Technology, Inc.
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| Part No. |
GS841Z18AGT-180 GS841Z18AGT-180I
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operati ons must be initiated with the advance/load pin (adv) held low, in order to load the new address. device activation is accomplished... |
| Description |
4Mb Pipelined and Flow Through Synchronous NBT SRAMs 256K X 18 ZBT SRAM, 8 ns, PQFP100
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| File Size |
489.27K /
30 Page |
View
it Online |
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GSI Technology, Inc.
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| Part No. |
GS842Z18AB-180I GS842Z18AB-100 GS842Z18AB-100I GS842Z36AB-180I GS842Z18AB-150 GS842Z18AB-166I
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operati ons must be initiated with the advance/load pin (adv) held low, in order to load the new address. device activation is accomplished... |
| Description |
4Mb Pipelined and Flow Through Synchronous NBT SRAMs 256K X 18 ZBT SRAM, 8 ns, PBGA119 4Mb Pipelined and Flow Through Synchronous NBT SRAMs 256K X 18 ZBT SRAM, 12 ns, PBGA119 4Mb Pipelined and Flow Through Synchronous NBT SRAMs 128K X 36 ZBT SRAM, 8 ns, PBGA119 4Mb Pipelined and Flow Through Synchronous NBT SRAMs 256K X 18 ZBT SRAM, 10 ns, PBGA119 4Mb Pipelined and Flow Through Synchronous NBT SRAMs 256K X 18 ZBT SRAM, 8.5 ns, PBGA119
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| File Size |
529.25K /
30 Page |
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it Online |
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GSI Technology, Inc.
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| Part No. |
GS8645Z36T-166T
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operati ons must be initiated with the advance/load pin (adv) held low, in order to load the new address. device activation is accomplished... |
| Description |
2M X 36 ZBT SRAM, 8 ns, PQFP100 TQFP-100
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| File Size |
495.97K /
23 Page |
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it Online |
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GSI Technology, Inc.
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| Part No. |
GS8162Z72C-150T GS8162Z72C-200T
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| OCR Text |
...near burst order and sleep) are synchr onized to rising clock edges. single c ycle read and write operat ions must be initiated with the advance/ load pin (adv) held low, in order to load the new address. device activation is accomplishe... |
| Description |
256K X 72 ZBT SRAM, 7.5 ns, PBGA209 14 X 22 MM, 1 MM PITCH, BGA-209 256K X 72 ZBT SRAM, 6.5 ns, PBGA209 14 X 22 MM, 1 MM PITCH, BGA-209
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| File Size |
766.08K /
31 Page |
View
it Online |
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Price and Availability
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