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    ST70137 ST70137TQFP

STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
Part No. ST70137 ST70137TQFP
OCR Text ... PCI_BRIDGE CFG_MEMs CFG_sel USB_PCIN_sel CLK SWITCHER TGB RST ATM FIFOs OBC FIFOs REGs PERIPHERAL GPIO IF Utop FSM ADSL uP OBC_IF TAP AFE IF TOSCA v. 2.0 OBC: On Board Controller TGB: Time Generation...
Description UNICORNTM PCI & USB CONTROLLERLESS ADSL DMT TRANSCEIVER

File Size 139.22K  /  22 Page

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    Z53C80 Z53C8003PSC Z53C8003VSC Z53C80SCSI

ZILOG[Zilog, Inc.]
Part No. Z53C80 Z53C8003PSC Z53C8003VSC Z53C80SCSI
OCR Text ...//O C//D /REQ /RST /sel 48 mA SCSI Transceivers /IOR /IOW /CS /RESET A2-A0 D7-D0 CPU BUS Interface Interface Control Logic Data Input Register Data Output Register DMA Logic Interrupt Logic Control Regist...
Description SMALL COMPUTER SYSTEM INTERFACE (SCSI)

File Size 213.70K  /  40 Page

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    MPC9447FA

Integrated Circuit Solution Inc
Part No. MPC9447FA
OCR Text ... (top view) 0 1 cclk0 cclk1 clk_sel clk_stop oe q0 q1 q2 q3 q4 q5 q6 q7 q8 v cc v cc 25k v cc 25k v cc clk stop sync (all input resistors have a value of 25 k ? ) gnd q2 v cc q1 gnd q0 v cc gnd q6 v cc q7 gnd q8 gnd q3 v cc q4 gnd q5 v cc g...
Description 9 LVCMOS Compatible Clock Outputs

File Size 284.36K  /  11 Page

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    MPC9446

Freescale Semiconductor, Inc
Freescale Semiconductor...
Part No. MPC9446
OCR Text ...k0 cclk1 fsela fselb fselc cclk_sel qa0 qa1 qa2 qb0 qb1 qb2 qc0 qc1 qc2 qc3 bank a bank b bank c 25k 25k 25k 25k 25k 25k 25k v cc v cc v cca qa2 gnd qa1 v cca qa0 gnd qc3 gnd qc2 v ccc qc1 gnd gnd qb0 v ccb qb1 gnd qb2 v ccb v ccc cclk_sel ...
Description 2.5 V and 3.3 V LVCMOS Clock Fanout Buffer

File Size 315.97K  /  12 Page

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    74ALVT16731 74ALVT16731DGG 74ALVT16731DL AV16731DGG AV16731DL

PHILIPS[Philips Semiconductors]
NXP Semiconductors
Part No. 74ALVT16731 74ALVT16731DGG 74ALVT16731DL AV16731DGG AV16731DL
OCR Text ...utput or a register mode by the sel input. When sel is a logic High the device is configured for transparent mode and when sel is a logic Low it is configured for register mode. While in the register mode the output follows the input on the...
Description Hex Schmitt-Trigger Inverters 14-SOIC -40 to 85
2.5V/3.3V 1-to-4 address register/driver (3-State)
2.5V/3.3V 1-to-4 address register/driver 3-State

File Size 87.62K  /  12 Page

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    New Japan Radio Co., Ltd.
Part No. NJU26208
OCR Text ...interface nju26208 sdo1 l/r wdc sel muteb proc fig.1 nju26208 hardware block diagram nju26208 - 3 - ver.2008-12-01 function block diagram nju26208 block diagram (stereo ...
Description SRS CS Auto & CSII 5.1 & TruSurround XT Decoder

File Size 285.52K  /  11 Page

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    BU2385KN

ROHM[Rohm]
Part No. BU2385KN
OCR Text ...CLK1_OUT 6 TEST1 7 XTAL_sel 8 FS3 9 FS2 10 FS1 Function with pull-down with pull up L : 14.318182MHz with pull up with pull up with pull up Explanation for terminal function PIN No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ...
Description Clock generator for digital still camera

File Size 57.01K  /  5 Page

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    INTEGRATED DEVICE TECHNOLOGY INC
Part No. MPC9991FA
OCR Text ...as a zero-delay buffer. the vco_sel pin provides an extended pll input reference frequency range. the sync pulse generator monitors the phase relationship between the qa[3:] and qc[2:0] output banks. the sync generator output signals the co...
Description 9991 SERIES, PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52

File Size 396.74K  /  13 Page

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