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FAIRCHILD[Fairchild Semiconductor]
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| Part No. |
74ACT818 74ACT818SPC 74ACT818CW
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| OCR Text |
...s and/or writable control store loading. The D-to-Y path provides an 8-bit parallel data path pipeline register for normal system operation....Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Logic Symbol
Connection Diagram
FACT ... |
| Description |
From old datasheet system 8-Bit Diagnostic Register
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| File Size |
54.70K /
6 Page |
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it Online |
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Philips
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| Part No. |
N74F604N N74F604D
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| OCR Text |
...nce NPN base inputs for reduced loading
(20A in High and Low states)
PIN CONFIGURATION
LE SELECT A/B A0 B0 A1 B1 1 2 3 4 5 6 7 8 9 10 1...Dual octal latch (3-State)
74F604
LOGIC SYMBOL
3 4 5 6 7 8 9 10 27 26 25 24 23 22 21 20
IE... |
| Description |
Dual octal latch 3-State
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| File Size |
54.71K /
8 Page |
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it Online |
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Zarlink
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| Part No. |
PDSP16256A PDSP16256
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| OCR Text |
... is used during automatic EPROM loading, reset and accumulator clearing. When this pin is low the control logic and accumulators are reset. ...DUAL MODE
MUX
NETWORK B
SINGLE MODE
CLKOP
BUSY DB15:0 X31:0
Figure. 4 Block Diagra... |
| Description |
Programmable FIR Filter
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| File Size |
196.27K /
25 Page |
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it Online |
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Philips
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| Part No. |
N74F1604N
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| OCR Text |
...nce NPN base inputs for reduced loading
(20A in high and low state) * Stores 16-bit wide data inputs, multiplexed 8-bit outputs
PIN CONF...dual octal transparent latch. Organized as 8-bit A and B latches, the latch outputs are connected by... |
| Description |
Latch
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| File Size |
92.36K /
11 Page |
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it Online |
Download Datasheet
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