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Cypress
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| Part No. |
CY7C1339A CY7C1339A-100AC CY7C1339A-66AC
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| OCR Text |
...s inputs are gated by registers controlled by a positive-edge-triggered clock input (CLK). The synchronous inputs include all addresses, all data inputs, address-pipelining chip enable (CE#), depth-expansion chip enables (CE2# and CE2), bur... |
| Description |
Fast access times: 4.8, 5, 6, and 7ns
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| File Size |
55.72K /
13 Page |
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it Online |
Download Datasheet
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CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY7C1340AF-66AI CY7C1340A-83AI CY7C1340A-83AC
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| OCR Text |
...s inputs are gated by registers controlled by a positive-edge-triggered clock input (clk). the synchronous inputs include all addresses, all data inputs, address-pipelining chip enable (ce ), depth-expansion chip enables (ce2 and ce2), bur... |
| Description |
128K X 32 STANDARD SRAM, 7 ns, PQFP100
128K X 32 STANDARD SRAM, 6 ns, PQFP100
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| File Size |
181.83K /
12 Page |
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it Online |
Download Datasheet |
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CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY7C1446V33-200AC
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| OCR Text |
...s inputs are gated by registers controlled by a positive-edge-triggered clock input (clk). the synchronous inputs include all addresses, all data inputs, address-pipelining chip enable (ce ), burst control inputs (adsc , adsp , and adv ), w... |
| Description |
512K X 72 CACHE SRAM, 3 ns, PQFP100
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| File Size |
645.06K /
31 Page |
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it Online |
Download Datasheet |
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CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY7C1325A-117BGC
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| OCR Text |
...s inputs are gated by registers controlled by a pos- itive-edge-triggered clock input (clk). the synchronous in- puts include all addresses, all data inputs, address-pipelining chip enable (ce ), depth-expansion chip enables (ce2 and ce2),... |
| Description |
256K X 18 STANDARD SRAM, 7.5 ns, PBGA119
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| File Size |
283.86K /
16 Page |
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it Online |
Download Datasheet |
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Price and Availability
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