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  50ps Datasheet PDF File

For 50ps Found Datasheets File :: 511    Search Time::1.313ms    
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    Maxim Integrated Products, Inc.
MAXIM[Maxim Integrated Products]
MAXIM - Dallas Semiconductor
Part No. MAX3748ETE MAX3748 MAX3748AETE MAX3748A
OCR Text ...iv 100mV/div 100mV/div 50ps/div 50ps/div 100ps/div 4 _______________________________________________________________________________________ Compact 155Mbps to 3.2Gbps Limiting Amplifier Typical Operating Characteri...
Description Circular Connector; No. of Contacts:53; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:23; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:23-53 RoHS Compliant: No
Compact 155Mbps to 3.2Gbps Limiting Amplifier

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    SY89823LHC SY89823LHCTR SY89823LHZ SY89823LHZTR SY89823L

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MICREL[Micrel Semiconductor]
Part No. SY89823LHC SY89823LHCTR SY89823LHZ SY89823LHZTR SY89823L
OCR Text ...00ps max.) Low pin-to-pin skew (50ps max.) Triple-buffered output enable (OE) -40C to +85C temperature range Available in a 64-pin EPAD-TQFP DESCRIPTION The SY89823L is a high-performance bus clock driver with 22 differential High-Speed...
Description 3.3V, 500MHz 1:22 DIFFERENTIAL HSTL (1.5V) FANOUT BUFFER/TRANSLATOR

File Size 118.26K  /  8 Page

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    SY89534LHH SY89535LHC SY89535LHCTR SY89535LHH SY89535LHHTR SY89535L SY89532L SY89533L SY89534L SY89534LHC SY89534LHCTR S

MICREL[Micrel Semiconductor]
Part No. SY89534LHH SY89535LHC SY89535LHCTR SY89535LHH SY89535LHHTR SY89535L SY89532L SY89533L SY89534L SY89534LHC SY89534LHCTR SY89534LHHTR
OCR Text ...V 10% power supply Low jitter: <50ps cycle-to-cycle Low pin-to-pin skew: <50ps TTL/CMOS compatible control logic 3 independently programmable output frequency banks: * 9 differential output pairs @BankB (LVPECL/LVDS) * 2 differential output...
Description 3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND LVDS BUS CLOCK SYNTHESIZER

File Size 102.37K  /  15 Page

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    MICREL[Micrel Semiconductor]
Part No. SY89531LHCTR SY89531LHC SY89531LHH SY89531LHHTR SY89531L MICRELINC-SY89531LHHTR
OCR Text ...10% power supply s Low jitter: <50ps cycle-to-cycle s Low pin-to-pin skew: <50ps s 33MHz to 500MHz output frequency range s Direct interface to crystal: 14MHz to 18MHz s LVPECL/HSTL outputs s TTL/CMOS compatible control logic s 3 independen...
Description 3.3V, PRECISION, 33MHz to 500MHz PROGRAMMABLE LVPECL AND HSTL BUS CLOCK SYNTHESIZER

File Size 101.61K  /  16 Page

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    AN1406 AN1406_D

ON Semiconductor
Part No. AN1406 AN1406_D
OCR Text ...network with minimal skew. With 50ps output-to-output skew of the MC10/100E111 and 1ns part-to-part skew available on the MC10/100H646 or MC10/100H641, a total of 72 or 81 TTL clocks, respectively, can be generated with a worst case skew be...
Description DESIGNING WITH PECL (ECL AT 5.0)

File Size 103.02K  /  8 Page

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    9DB423BFLF 9DB423BGLFT 9DB423BFLFT

Integrated Device Technology
Part No. 9DB423BFLF 9DB423BGLFT 9DB423BFLFT
OCR Text ...s  output cycle-cycle jitter < 50ps.  output to output skew <50ps  phase jitter: pcie gen1 < 86ps peak to peak  phase jitter: pcie gen2 < 3.0/3.1ps rms  phase jitter: qpi < 0.5ps rms  rohs compliant packaging features/benefits  sprea...
Description Four Output Differential Buffer for PCIe Gen 1, Gen 2 and QPI

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    INTEGRATED DEVICE TECHNOLOGY INC
Part No. 9DB833AGLF
OCR Text ...s ? outputs cycle-cycle jitter <50ps ? output to output skew <50ps ? phase jitter: pcie gen3 <1.0ps rm block diagram lock stop logic src_in src_in# dif(7:0)) control logic byp#_lobw_hibw smbdat smbclk pd# spread compatible pll 8 iref oe...
Description 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48

File Size 224.39K  /  18 Page

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    MC100H646 MC100EP445FA MC100E156FNR2 MC100EPT22D MC100EPT22DR2 MC10EP451 MC100EP05D MC10EP32DT MC100EL38DWR2 MC100EL12DR

ON Semiconductor
Part No. MC100H646 MC100EP445FA MC100E156FNR2 MC100EPT22D MC100EPT22DR2 MC10EP451 MC100EP05D MC10EP32DT MC100EL38DWR2 MC100EL12DR2
OCR Text ...network with minimal skew. With 50ps output-to-output skew of the MC10/100E111 and 1ns part-to-part skew available on the MC10/100H646 or MC10/100H641, a total of 72 or 81 TTL clocks, respectively, can be generated with a worst case skew be...
Description PECL/TTL-TTL 1:8 Distribution Chip
3.3V / 5VECL 8-Bit Serial/Parallel Converter
5V ECL 3-Bit 4:1 Mux-Latch
3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V / 5V 2-Input Differential AND/NAND
3.3V / 5V ECL ÷2 Divider
5V ECL Divide by 2, Divide by 4/6 Clock Generation Chip
5V ECL Low Impedance Driver

File Size 103.89K  /  8 Page

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    Maixm
Part No. MAX3296
OCR Text ... 10 100 CAPACITANCE (pF) 1k 10k 50ps/div 2.5Gbps, 1310nm Laser, 27 - 1 PRBS, iMOD = 15mA 4 _______________________________________________________________________________________ 3.0V to 5.5V, 1.25Gbps/2.5Gbps LAN Laser Drivers Ty...
Description 3.0V to 5.5V, 1.25Gbps/2.5Gbps LAN Laser Drivers

File Size 729.32K  /  28 Page

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    MAX9326 MAX9326EGI

Maxim Integrated Products
Part No. MAX9326 MAX9326EGI
OCR Text ...mely low output-to-output skew (50ps max) and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a backplane or board. The device repeats an HSTL or LVECL/LVPECL differential input at ...
Description From old datasheet system
1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver

File Size 307.09K  /  12 Page

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