| |
|
 |
G-LINK Technology
|
| Part No. |
GLT4160M04-60J3 GLT4160M04-60TC
|
| OCR Text |
...random access memory containing 16,777,216 bits organized in a x4 configuration. the glt4160m04 offers page cycle access with extended dat...4m x 4 cmos dynamic ram with extended data output jan 2000 (rev. 1.3) g-link technology 2701 northwe... |
| Description |
60ns; 4K x 4 CMOS dynamic RAM with extended data output
|
| File Size |
355.57K /
21 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Cypress Semiconductor, Corp.
|
| Part No. |
CY7C1568KV18-550BZXC
|
| OCR Text |
...w output logic reg. reg. reg. 8 16 8 nws [1:0] v ref write add. decode 8 22 8 ld control r/w doff 4m x 8 array 4m x 8 array 8 dq [7:0] 8 cq cq qvld write reg write reg clk a (21:0) gen. k k control logic address register read add. decode re... |
| Description |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4mb x 18; Vcc (V): 1.7 to 1.9 V 4m X 18 DDR SRAM, 0.45 ns, PBGA165
|
| File Size |
601.94K /
29 Page |
View
it Online |
Download Datasheet |
| |
|
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| Part No. |
CY7C1568KV18-500BZXC CY7C1568KV18-500BZC CY7C1570KV18-500BZXC CY7C1570KV18-450BZXC
|
| OCR Text |
...w output logic reg. reg. reg. 8 16 8 nws [1:0] v ref write add. decode 8 22 8 ld control r/w doff 4m x 8 array 4m x 8 array 8 dq [7:0] 8 cq cq qvld write reg write reg clk a (21:0) gen. k k control logic address register read add. decode re... |
| Description |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4mb x 18; Vcc (V): 1.7 to 1.9 V 4m X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
|
| File Size |
611.30K /
30 Page |
View
it Online |
Download Datasheet |
| |
|
|
Cypress Semiconductor, Corp.
|
| Part No. |
CY7C1518KV18-300BZXC
|
| OCR Text |
...w output logic reg. reg. reg. 8 16 8 nws [1:0] v ref write add. decode 8 22 c c 8 ld control r/w doff 4m x 8 array 4m x 8 array 8 dq [7:0] 8 cq cq write reg write reg clk a (21:0) gen. k k control logic address register read add. decode rea... |
| Description |
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4mb x 18; Vcc (V): 1.7 to 1.9 V 4m X 18 DDR SRAM, 0.45 ns, PBGA165
|
| File Size |
973.05K /
33 Page |
View
it Online |
Download Datasheet |
| |
|
|
FUJITSU[Fujitsu Media Devices Limited]
|
| Part No. |
MBM29F033C MBM29F033C-12 MBM29F033C-12PTN MBM29F033C-12PTR MBM29F033C-70 MBM29F033C-70PTN MBM29F033C-70PTR MBM29F033C-90 MBM29F033C-90PTN MBM29F033C-90PTR
|
| OCR Text |
... sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-31, 3235, 36-39, 40-43, 44-47, 48-51, 52-55, 56-59, and 60-63. Fujitsu has implement...4m x 8-Bit) CMOS Flash Memory 5.0 V-only Read, Write, and Erase 64K Bytes (64 Sectors)
8
MBM29... |
| Description |
32M (4m X 8) BIT
|
| File Size |
279.56K /
46 Page |
View
it Online |
Download Datasheet |
| |
|
|
Omron Electronics LLC Industrial Automation
|
| Part No. |
DP3Z4mX16PMBY5-90CI
|
| OCR Text |
...cks are constrcted of four 1m x 16 flash eeprom?s that are configured as a 4m x 16. the module features high speed access times with common data inputs and putputs. the flash devices used in this module also features bgo (blank ground opera... |
| Description |
4m X 16 FLASH 3.3V PROM MODULE, 90 ns, QMA56 STACK, TSOP-56
|
| File Size |
136.90K /
2 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
