| |
|
 |
Agere
|
| Part No. |
T5504
|
| OCR Text |
...slot 0, the number of multiples separating FSXN and FSEP is the time-slot number. In the T5504, FSXN for time slot 0 nominally starts on the MCLK positive edge following the negative edge which detects FSEP.
The frequency of the master c... |
| Description |
IC,PCM CODEC,QUAD,CMOS,LDCC,28PIN,PLASTIC From old datasheet system
|
| File Size |
121.48K /
18 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
http:// AMSCO[austriamicrosystems AG]
|
| Part No. |
AS1150 AS1151 AS1150-T AS1151-T
|
| OCR Text |
...layout and reduces crosstalk by separating the LVDS inputs and LVCMOS outputs. The devices are available in a 16-pin TSSOP package. Figure 1. Block Diagrams
VCC
2 Key Features
! ! ! ! ! ! ! ! !
Flow-Through Pinout Guaranteed 500Mbps... |
| Description |
Quad LVDS Receivers
|
| File Size |
157.26K /
15 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
AMSCO[austriamicrosystems AG]
|
| Part No. |
AS1152 AS1152-T
|
| OCR Text |
...layout and reduces crosstalk by separating the LVTTL/LVCMOS inputs and LVDS outputs. The AS1152 operates from a single +3.3V supply and is specified for operation from -40 to +85C.
2 Key Features
! !
Flow-Through Pinout Guaranteed 50... |
| Description |
Quad LVDS Driver
|
| File Size |
139.49K /
15 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
TOREX
|
| Part No. |
XC6382E
|
| OCR Text |
...wn mode, or a VDD pin function (separating power and voltage detect pins). SOT-23, SOT-25 and SOT-89-5 super mini-mold packages. Operating (start-up) voltage range : 0.9V~10V Output voltage range : 2.0V~7.0V in 0.1V increments Highly accura... |
| Description |
PFM CONTROLLED STEP UP DC/DC CONVERTERS
|
| File Size |
278.12K /
18 Page |
View
it Online |
Download Datasheet
|
|

Price and Availability
|