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DTA115TL ADUC816 10A10 BT102 74AHC1 74AHC1 74AHC1 DTA115TL
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  dual-stage Datasheet PDF File

For dual-stage Found Datasheets File :: 9905    Search Time::2.578ms    
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    CD74HCT393M CD74HC393M 74393 CD74HC393E CD74HCT393E

Harris Semiconductor
HARRIS[Harris Corporation]
Part No. CD74HCT393M CD74HC393M 74393 CD74HC393E CD74HCT393E
OCR Text Dual 4 -Stage Binary Counter Description The Harris CD74HC393 and CD74HCT393 are 4-stage ripple-carry binary counters. Al counter stages are masterslave flip-flops. The state of the stage advances one count on the negative transition of e...
Description High Speed CMOS Logic Dual 4 -Stage Binary Counter
CTV 6C 6#20 PIN PLUG

File Size 30.84K  /  7 Page

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    CXA1917AM CXA1917AS

SONY[Sony Corporation]
Part No. CXA1917AM CXA1917AS
OCR Text ... 14 VCT 0 14 For dual power supply: Ground For single power supply: VCT GND 15 VEE -6.0 For dual power supply: Negative power supply For single power supply: Ground Positive power supply VCC 16 VCC 6....
Description Dolby S type Noise Reduction Processor

File Size 394.67K  /  16 Page

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    CXP82316 CXP82320 CXP82324

SONY[Sony Corporation]
Part No. CXP82316 CXP82320 CXP82324
OCR Text ... Segment signal output for FDP. Dual purpose output for FDP timing and segment signals. Timing signal output for FDP. (Port D) 8-bit dedicated output port. Segment signal output for FDP. (8 pins) -4- Segment signal output for FDP. PG0 to...
Description CMOS 8-bit Single Chip Microcomputer

File Size 322.79K  /  20 Page

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    CXP823P24

SONY[Sony Corporation]
Part No. CXP823P24
OCR Text ... Segment signal output for FDP. Dual purpose output for FDP timing and segment signals. Timing signal output for FDP. (Port D) 8-bit dedicated output port. Segment signal output for FDP. (8 pins) -4- Segment signal output for FDP. PG0 to...
Description CMOS 8-bit Single Chip Microcomputer

File Size 324.50K  /  20 Page

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    DM74LS221 DM74LS221M DM74LS221N DM74LS221SJ 74LS221

FAIRCHILD[Fairchild Semiconductor]
Part No. DM74LS221 DM74LS221M DM74LS221N DM74LS221SJ 74LS221
OCR Text Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs August 1986 Revised April 2000 DM74LS221 Dual Non-Retriggerable O...stage also provides a high immunity to VCC noise. The clear (CLR) input can terminate the output pul...
Description    Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs

File Size 107.69K  /  8 Page

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