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For chronous Found Datasheets File :: 713    Search Time::0.688ms    
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    Electronic Theatre Controls, Inc.
Part No. NT5DS32M8AW-8B NT5DS64M4AW-8B NT5DS32M8AW-75B NT5DS64M4AW-75B
OCR Text ...ctive in any bank). cke is syn- chronous for power down entry and exit, and for self refresh entry. cke is asynchronous for self refresh exit. cke must be maintained high throughout read and write accesses. input buffers, excluding ck, c...
Description 256Mb Double Data Rate SDRAM 256MB双数据速率SDRAM

File Size 1,541.33K  /  78 Page

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    Bourns, Inc.
Part No. PPC403GB-KA28C-1
OCR Text ...into three basic classes: asyn- chronous imprecise exceptions, synchronous precise exceptions, and asynchronous precise exceptions. asynchronous exceptions are caused by events external to processor execu- tion, while synchronous excepti...
Description 32-Bit Microprocessor 32位微处理

File Size 364.34K  /  44 Page

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    Hynix Semiconductor Inc.
Hynix Semiconductor, Inc.
Part No. HY5DU56422ALT-K HY5DU56422ALT-J HY5DU56822ALT-J HY5DU561622ALT-J HY5DU561622ALT-H HY5DU56822ALT-H HY5DU56422ALT-H HY5DU56422AT-J HY5DU561622ALT-K HY5DU561622AT-K HY5DU561622ALT-M HY5DU561622AT-H
OCR Text ...cmos double data rate(ddr) syn- chronous dram, ideally suited for the main memory applications which requires large memory density and high band- width. the hynix 256mb ddr sdrams offer fully synchronous operatio ns referenced to both risi ...
Description 256M-S DDR SDRAM 64M X 4 DDR DRAM, 0.7 ns, PDSO66
256M-S DDR SDRAM 16M X 16 DDR DRAM, 0.75 ns, PDSO66

File Size 370.38K  /  36 Page

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    Silicon Storage Technology
Part No. SST39SF020
OCR Text ... the nonvolatile write is asyn- chronous with the system; therefore, either a data# polling or toggle bit read may be simultaneous with the completion of the write cycle. if this occurs, the system may possibly get an erroneous result, i.e....
Description 2 Megabit (256K x 8) Multi-Purpose Flash

File Size 287.60K  /  23 Page

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    ADSP-21261SBBC-150

Analog Devices
Part No. ADSP-21261SBBC-150
OCR Text ... plus a single 20-bit wide syn- chronous parallel data acquisition port supports receive audio channel data in i 2 s, left-justified sample pair, or right-justified mode signal routing unit provides configurable and flexible connections ...
Description 3rd Generation, Low-Cost, 150 MHz SHARC Processor

File Size 534.12K  /  44 Page

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    Monolithic Power Systems, Inc.
Part No. CR32-100 DO1605T-103MX
OCR Text ...in =4.2v mp2101 ? 1.6mhz syn chronous step-down plus 200ma ldo mp2101 rev. 1.0 www.monolithicpower.com 2 8/18/2006 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2006 mps. all rights reserve...
Description 1.6MHz Synchronous Step-Down plus 200mA LDO 1.6MHz的同步降压型00mA的LDO稳压

File Size 466.27K  /  12 Page

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    Electronic Theatre Controls, Inc.
Part No. IS61SP12832-5TQI IS61SP12836-5B IS61SP12836-5TQI IS61SP12836-150B IS61SP12832-150TQI IS61SP12836-150TQI IS61SP12836-133TQ IS61SP12832-133TQI
OCR Text ...le monolithic circuit. all syn- chronous inputs pass through registers controlled by a positive-edge-triggered single clock input. write cycles are internally self-timed and are initiated by the rising edge of the clock input. write cycles ...
Description x32 Fast Synchronous SRAM
x36 Fast Synchronous SRAM x36快速同步SRAM

File Size 125.61K  /  15 Page

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    意法半导
STMicroelectronics N.V.
Part No. M58MR032-ZCT M58MR032C120ZC6T M58MR032D120ZC6T M58MR032C100ZC6T M58MR032D100ZC6T
OCR Text ... . k is don't care during asyn- chronous page mode read and in write operations. wait (wait ). wait is an output signal used dur- ing burst mode read, indicating whether the data on the output bus are valid or a wait state must be inserted...
Description 32 Mbit 2Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory 32兆位Mb x16插槽,复用的I / O,双行,突发1.8V电源快闪记忆

File Size 404.29K  /  52 Page

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    Xilinx, Inc.
XILINX INC
Part No. XCR3032-8VQ44C XCR3032-8VQ44I XCR3032-12PC44C XCR3032-12PC44I XCR3032-12VQ44I XCR3032-10VQ44I XCR3032-8PC44C XCR3032-10PC44I XCR3032-12VQ44C
OCR Text ...external source) or as an asyn- chronous clock (driven by a macrocell equation). the timing for asynchronous clocks is different in that the t co time is extended by the amount of time that it takes for the signal to propagate through the ...
Description 32 Macrocell CPLD EE PLD, 15 ns, PQCC44
32 Macrocell CPLD 32宏单元CPLD
32 Macrocell CPLD EE PLD, 15 ns, PQFP44
32 Macrocell CPLD EE PLD, 12.5 ns, PQFP44
32 Macrocell CPLD EE PLD, 10.5 ns, PQCC44
32 Macrocell CPLD EE PLD, 12.5 ns, PQCC44

File Size 199.97K  /  14 Page

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