| |
|
 |
TY Semiconductor Co., Ltd
|
| Part No. |
2SB852
|
| OCR Text |
...ain. b uilt-in 4k resis tor betwe en base and em itt er. absolute maxim um ratings t a = 25 paramet er sym bol rating unit collector-base volt age v cbo -40 v collector-em itt er voltage v ceo -32 v em itt er-base voltage v ebo -6 ... |
| Description |
Darlington connection for high DC current gain. between base and emitter.
|
| File Size |
154.54K /
2 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
IDT
|
| Part No. |
IDT71V2558SA IDT71V2558S IDT71V2556SA IDT71V2556S
|
| OCR Text |
...erial input of registers placed betwe en TDI and TDO. Sampled on rising edge of TCK. This pin has an internal pullup. Clock input of TAP controller. Each TAP event is clocked. Test inputs are captured on rising edge of TCK, while test outpu... |
| Description |
128K x 36, 256K x 18 3.3V Synchronous ZBT? SRAMs 2.5V I/O, Burst Counter Pipelined Outputs
|
| File Size |
513.18K /
28 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
OMRON
|
| Part No. |
E2C-EDA
|
| OCR Text |
...erential detectio n switchable betwe en single edge an d double edge dete c tion mode single edge: can be set to 300 s, 500 s, 1 ms, 10 ms, or 100 ms double edge: can be set to 500 s, 1 ms, 2 ms, 20 ms, or 200 ms. tim e r fun c ti... |
| Description |
Proximity Sensor
|
| File Size |
2,182.94K /
15 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
Leadtrend
|
| Part No. |
LD7850GL LD7850GSE
|
| OCR Text |
...n (ocp) the voltage difference betwe en vcc and phas e pins will trigger ocp if it is higher than 1.0v. thus, iocp, the threshold current for triggering ocp, can be set as follows: ds(on) ocp r v 0 . 1 i = where, rds denotes the tu... |
| Description |
High Voltage Step-Down White LED Driver
|
| File Size |
300.64K /
15 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
NANYA TECHNOLOGY CORP
|
| Part No. |
NT5SV8M16FT-6KI
|
| OCR Text |
... table showing the relationship betwe en the cas latency, speed grade, and clock frequency appears in the electrica l characteristics section of this document. once th e appropriate cas latency has been selected it must be programmed in... |
| Description |
8M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54
|
| File Size |
747.36K /
65 Page |
View
it Online |
Download Datasheet
|
|

Price and Availability
|