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M74AL 1N6042E3 FCT16 EBK24B IDT54 A500LB SBL10 CC78K0S
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    MICROCHIP[Microchip Technology]
Part No. 24C04A_04 24C04A-E_P 24C04A-E_SL 24C04A-E_SM 24C04A-E_SN 24C04AT-E_P 24C04AT-E_SL 24C04AT-E_SM 24C04AT-E_SN 24C04A-E/P 24C04A-E/SL 24C04A-E/SM 24C04A-E/SN 24C04AT-E/P 24C04AT-E/SN 24C04AT-E/SL 24C04AT-E/SM
OCR Text ... Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit. Note: The 24C04A does not...
Description 4K 5.0V I 2 C ?Serial EEPROM
4K 5.0V I 2 C ⑩ Serial EEPROM

File Size 117.96K  /  14 Page

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    GEC Plessey Semiconductors
Part No. NJ8821BA
OCR Text ...0-d3 pins to the internal latch addressed by the data select (ds0-ds2) pins . a logic 0 disables the data inputs. data select inputs for addressing the internal data latches modulus control output for controlling an external dual-modulus pr...
Description Frequency synthesiser (microprocessor interface) with resettable counters

File Size 127.79K  /  6 Page

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    Microchip Technology, Inc.
MicrochipTechnology
Microchip Technology Inc.
MICROCHIP[Microchip Technology]
Part No. 24FC65-SM 24FC65 24FC65-IP 24FC65-ISM 24FC65-P
OCR Text ... Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit. Note: The 24FC65 does not...
Description 64K 5.0V 1 MHz I 2 C Smart Serial EEPROM 64K.0V 1兆赫的I 2 C串行EEPROM智能
64K 5.0V 1 MHz I 2 C Smart Serial EEPROM
64K5.0V1MHzI2CSmartSerialEEPROM

File Size 121.55K  /  16 Page

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    MICROCHIP[Microchip Technology]
Part No. 24FC65_04 24FC65-_P 24FC65-_SM 24FC65-I_P 24FC65-I_SM 24FC65T-_P 24FC65T-_SM 24FC65T-I_P 24FC65T-I_SM 24FC65-/SM 24FC65-/P 24FC65-I/P 24FC65-I/SM 24FC65T-/P 24FC65T-/SM
OCR Text ... Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit. Note: The 24FC65 does not...
Description 64K 5.0V 1 MHz I2C?/a> Smart Serial?/a> EEPROM
64K 5.0V 1 MHz I2C Smart Serial EEPROM
64K 5.0V 1 MHz I2C⑩ Smart Serial⑩ EEPROM

File Size 165.18K  /  14 Page

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    CATALYST[Catalyst Semiconductor]
Part No. CAT28C256NI-12T CAT28C256N-15T CAT28C256NI-15T CAT28C256T13-15T CAT28C256T13I-12T CAT28C256T13I-15T CAT28C256N-12T CAT28C256_04 CAT28C256 CAT28C256G-12T CAT28C256G-15T CAT28C256GA-12T CAT28C256GA-15T CAT28C256GI-12T CAT28C256GI-15T CAT28C256H13-12T CAT28C256H13-15T CAT28C256H13A-12T CAT28C256H13A-15T CAT28C256H13I-12T CAT28C256H13I-15T CAT28C256L-12T CAT28C256L-15T CAT28C256LA-12T CAT28C256LA-15T CAT28C256LI-12T CAT28C256LI-15T CAT28C256NA-12T CAT28C256NA-15T CAT28C256P-12T CAT28C256P-15T CAT28C256PA-12T CAT28C256PA-15T CAT28C256PI-12T CAT28C256PI-15T CAT28C256T13-12T CAT28C256T13A-12T CAT28C256T13A-15T
OCR Text ... cycle automatically erases the addressed byte and the new data is written within 5 ms. Figure 3. Read Cycle tRC ADDRESS tCE CE tOE OE VIH WE tLZ tOLZ DATA OUT HIGH-Z tOH DATA VALID tAA tOHZ tHZ DATA VALID Figure 4. Byte Write Cycle ...
Description 256K-Bit Parallel EEPROM

File Size 513.28K  /  12 Page

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    MICROCHIP[Microchip Technology]
Part No. 24LC164T-I_SNSQTP 24LC164 24LC164-_P 24LC164-_PQTP 24LC164-_PSQTP 24LC164-_SN 24LC164-_SNQTP 24LC164-_SNSQTP 24LC164-I_P 24LC164-I_PQTP 24LC164-I_PSQTP 24LC164-I_SN 24LC164-I_SNQTP 24LC164-I_SNSQTP 24LC164T-_P 24LC164T-_PQTP 24LC164T-_PSQTP 24LC164T-_SN 24LC164T-_SNQTP 24LC164T-_SNSQTP 24LC164T-I_P 24LC164T-I_PQTP 24LC164T-I_PSQTP 24LC164T-I_SN 24LC164T-I_SNQTP 24LC164T-/SNSQTP 24LC164T-/P 24LC164T-/PQTP 24LC164T-/PSQTP 24LC164T-/SNQTP 24LC164-/SNSQTP 24LC164-/PSQTP 24LC164T-I/SNSQTP 24LC164T-I/PSQTP 24LC164-I/PSQTP 24LC164-I/SNSQTP 24LC164-/SNQTP 24LC164-/PQTP 24LC164-I/SNQTP 24LC164-I/PQTP 24LC164T-I/PQTP 24LC164T-I/SNQTP
OCR Text ... Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit.. Note: The 24LC164 does n...
Description  
16K 2.5V Cascadable I2C⑩ Serial EEPROM
16K 2.5V Cascadable I2C Serial EEPROM
16K 2.5V Cascadable I2C?/a> Serial EEPROM

File Size 157.96K  /  16 Page

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    UTC
ONSEMI[ON Semiconductor]
Part No. 2SD88205 MC74ACT259NG 74AC259 MC74AC259 MC74AC259D MC74AC259DG MC74AC259DR2 MC74AC259DR2G MC74AC259M MC74AC259MEL MC74AC259MELG MC74AC259MG MC74AC259N MC74AC259NG MC74ACT259 MC74ACT259D MC74ACT259DG MC74ACT259DR2 MC74ACT259DR2G MC74ACT259N
OCR Text ... the last cycle in which it was addressed or cleared. FUNCTIONAL DESCRIPTION The MC74AC259/74ACT259 has four modes of operation as shown in the Mode Selection Table. In the addressable latch mode, data on the Data line (D) is written int...
Description MEDIUM POWER LOW VOLTAGE TRANSISTOR
8−Bit Addressable Latch

File Size 117.36K  /  11 Page

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    PCF85116-3T_01 PCF85116-3P_01 PCF85116-3 PCF85116-3P/01 PCF85116-3T/01

NXP Semiconductors
PHILIPS[Philips Semiconductors]
Part No. PCF85116-3T_01 PCF85116-3P_01 PCF85116-3 PCF85116-3P/01 PCF85116-3T/01
OCR Text ...se. The slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte. 9397 750 14217 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 04 -- 25 Octo...
Description 2048 x 8-bit CMOS EEPROM with I2C-bus interface

File Size 158.99K  /  21 Page

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    SL2S5102FUD

NXP Semiconductors
Part No. SL2S5102FUD
OCR Text ...bit destroy password enables an addressed label to be destroyed with the destroy slix-l command. that status is irreversible and the label will never respond to any command again. sl2s5002; sl2s5102 icode slix-l rev. 3.4 ? 27 august 2012 ...
Description ICODE SLIX-L

File Size 180.62K  /  35 Page

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    ANACHIP[Anachip Corp]
Part No. AM24LC16VSA AM24LC16 AM24LC16I AM24LC16IN AM24LC16INA AM24LC16IS AM24LC16ISA AM24LC16N AM24LC16NA AM24LC16S AM24LC16SA AM24LC16V AM24LC16VN AM24LC16VNA AM24LC16VS
OCR Text ...dge Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit. The device that acknowled...
Description 2-Wire Serial 16K-bits (2048 x 8) CMOS Electrically Erasable PROM

File Size 200.41K  /  10 Page

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