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1N4934G 80MHZ 42259 N5399 REF198FS SII3132 TZS4693 MP8007
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    HA16103 HA16103FPJ HA16103FPK

HITACHI[Hitachi Semiconductor]
Part No. HA16103 HA16103FPJ HA16103FPK
OCR Text ...hen input pulses are not at the preselected frequency (at either a higher or lower frequency). The RC characteristic of the bandpass filter may be set with external components Rf and Cf. Equation 3 specifies how to determine the minimum pul...
Description Watchdog Timer

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    IDT72V2103L10PF IDT72V2113L10PFI IDT72V2113L7-5BCI IDT72V2113L7-5PF IDT72V2103L7-5BC IDT72V2103L7-5BCI IDT72V2103L7-5PF

Integrated Device Technology, Inc.
Part No. IDT72V2103L10PF IDT72V2113L10PFI IDT72V2113L7-5BCI IDT72V2113L7-5PF IDT72V2103L7-5BC IDT72V2103L7-5BCI IDT72V2103L7-5PF IDT72V2113L7-5PFI IDT72V2113L6BCI IDT72V2113L6PFI IDT72V2113L5BCI IDT72V2113L5PFI IDT72V2103L5PF IDT72V2103L15PF
OCR Text ...lag can default to one of eight preselected offsets Selectable synchronous/asynchronous timing modes for AlmostEmpty and Almost-Full flags Program programmable flags by either serial or parallel means Select IDT Standard timing (using EF an...
Description 3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO 128K X 18 OTHER FIFO, 10 ns, PQFP80
3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO 128K X 18 OTHER FIFO, 6.5 ns, PQFP80
3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO 3.3伏高密度SUPERSYNC二窄总线先进先出
Octal bus transceiver/register (3-State) - Description: Transceiver/Register (3-State) ; Fmax: 350 MHz; Logic switching levels: TTL ; Number of pins: 24 ; Output drive capability: -32/ 64 mA ; Propagation delay: 4.4 ns; Voltage: 4.5-5.5 V

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    IC-MGEVALMG1D IC-MGTSSOP20

IC-Haus GmbH
Part No. IC-MGEVALMG1D IC-MGTSSOP20
OCR Text ...e minimum phase distance can be preselected, thus generating fail-safe counter signals and enhancing the noise immunity of the sensor system. Programmable instrumentation amplifiers with selectable gain levels permit differential (in VDIFF ...
Description 8-Bit Sin/Cos INTERPOLATION IC WITH RS422 DRIVER

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    Harris Semiconductor
Part No. HA3-2444-9
OCR Text ...nable the output with a channel preselected. Measured from the 50% point of the Enable input to 4V on the output. AV = +1 for all channels. VIN = 5V for the selected channel. VIN = 5VP-P, f = 5MHz, for one of the 3 unselected channels. VIN ...
Description 50MHz, Selectable, Four Channel Video Operational Amplifier

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    IDT72V36110L7.5PFI IDT72V36100L7.5PFI IDT72V36110L7.5BBI IDT72V36100L7.5BBI IDT72V36100L10BB IDT72V36100L10BBI IDT72V361

Integrated Device Technology, Inc.
Part No. IDT72V36110L7.5PFI IDT72V36100L7.5PFI IDT72V36110L7.5BBI IDT72V36100L7.5BBI IDT72V36100L10BB IDT72V36100L10BBI IDT72V36100L10PFI IDT72V36100L15BB IDT72V36100L15BBI IDT72V36100L15PFI IDT72V36100L6BB IDT72V36100L6BBI IDT72V36100L6PF IDT72V36100L6PFI IDT72V36110L6BBI IDT72V36110L15BBI IDT72V36110L6PF IDT72V36110L15PFI IDT72V36110L10PFI IDT72V36110L10BB IDT72V36110L10BBI IDT72V36110L6PFI
OCR Text ...lag can default to one of eight preselected offsets Selectable synchronous/asynchronous timing modes for AlmostEmpty and Almost-Full flags Program programmable flags by either serial or parallel means Select IDT Standard timing (using EF an...
Description 3.3 VOLT HIGH-DENSITY SUPERSYNC II 36-BIT FIFO
3.3 VOLT HIGH-DENSITY SUPERSYNC II36-BIT FIFO
3.3 VOLT HIGH-DENSITY SUPERSYNC II?/a> 36-BIT FIFO

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    Integrated Device Technology, Inc.
INTEGRATED DEVICE TECHNOLOGY INC
Part No. IDT72T1875L4-4BB IDT72T1865L4-4BBI IDT72T1885L4-4BB IDT72T18105L4-4BB IDT72T1895L4-4BBI IDT72T1855L4-4BBI IDT72T1875L4-4BBI IDT72T1885L4-4BBI IDT72T18115L4-4BBI IDT72T1845L4-4BBI IDT72T18125L4-4BBI IDT72T18105L4-4BBI IDT72T1845L6-7BB IDT72T1865L6-7BB IDT72T1895L6-7BB IDT72T18105L6-7BB IDT72T1845L6-7BBI IDT72T1875L6-7BBI IDT72T1885L6-7BBI IDT72T1895L6-7BBI IDT72T18115L6-7BB IDT72T18125L6-7BB IDT72T1855L6-7BBI IDT72T1865L6-7BBI IDT72T18125L6-7BBI IDT72T18115L6-7BBI IDT72T18105L6-7BBI IDT72T18115L5BBI IDT72T1865L5BB IDT72T1865L5BBI IDT72T1845L5BBI IDT72T1855L5BBI IDT72T18105L5BB IDT72T18125L5BB IDT72T18105L5BBI IDT72T18125L5BBI IDT72T1845L10BBI IDT72T18115L10BBI IDT72T1865L10BBI
OCR Text ...lag can default to one of eight preselected offsets Program programmable flags by either serial or parallel means Selectable synchronous/asynchronous timing modes for Almost- * * * * * * * * * * * * * * * Empty and Almost-Full flag...
Description 2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS 2.5伏高速TeraSync先进先出18-BIT/9-BIT配置
2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS 2.5伏高TeraSync先进先出18-BIT/9-BIT配置
2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS 128K X 18 OTHER FIFO, 3.4 ns, PBGA240
2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS 4K X 18 OTHER FIFO, 3.4 ns, PBGA144

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