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For o-rings Found Datasheets File :: 558    Search Time::2.266ms    
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    345101 571RCCP 345121 571007 571007P 571008 571008P 571027 571027P 571028 571028P 571OCC 571OCCP 571RCC

Littelfuse, Inc.
LITTELFUSE[Littelfuse]
Part No. 345101 571RCCP 345121 571007 571007P 571008 571008P 571027 571027P 571028 571028P 571OCC 571OCCP 571RCC
OCR Text ...8P, 571 OCCP, and 571 RCCP, two o-rings for watertight seal per MIL-PRF-19207. (R) (R) Reference Dimensions .15" MAX 1.72" DIA. (2) 1.12" .032" STANDARD MOUNTING (FLANGE IN FRONT OF PANEL) 2 MOUNTING HOLES FOR No. 8...
Description FOR 3AG, 5 x 20mm, OR MIDGET FUSES AG x 20毫米,或极小的保险丝

File Size 80.01K  /  1 Page

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    FAIRCHILD[Fairchild Semiconductor]
Part No. SCANPSC110FSC SCANPSC110F SCANPSC110FSCX
OCR Text ...n Description Table Name TMSB I/O (Note 1) TTL Input w/Pull-Up Resistor Pin # (SOIC & LCC) 10 Description BACKPLANE TEST MODE SELECT: Controls sequencing through the TAP Controller of the SCANPSC110F Bridge. Also controls sequencing of the ...
Description SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE 1149.1 Support)
SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
From old datasheet system

File Size 267.57K  /  25 Page

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    CYS25G0101DX-ATI CYS25G0101DX-ATC CYS25G0101DX CYS25G0101DX-BBC

Cypress Semiconductor Corp.
CYPRESS[Cypress Semiconductor]
Part No. CYS25G0101DX-ATI CYS25G0101DX-ATC CYS25G0101DX CYS25G0101DX-BBC
OCR Text ...rallel Interface The parallel I/O interface supports high-speed bus communications using HSTL signaling levels to minimize both power consum...rings that are maintained in standby, the CYS25G0101DX may also be dynamically powered down to conse...
Description Physical Layer Devices 物理层设
SONET OC-48 Transceiver Features

File Size 211.13K  /  15 Page

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    CYS25G0101DX-ATXC CYS25G0101DX-ATXI CYS25G0101DX CYS25G0101DX07 CYS25G0101DX-07

Cypress Semiconductor Corp.
Part No. CYS25G0101DX-ATXC CYS25G0101DX-ATXI CYS25G0101DX CYS25G0101DX07 CYS25G0101DX-07
OCR Text ...allel Interface The parallel I/O interface supports high speed bus communications using HSTL signaling levels to minimize both power consum...rings that are maintained in standby, the CYS25G0101DX may also be dynamically powered down to conse...
Description SONET OC-48 Transceiver(SONET OC-48收发 与SONET OC - 48收发器(与SONET OC - 48收发器)

File Size 275.82K  /  17 Page

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    CY7C457 CY7C456 CY7C455 CY7C457-30JCT CY7C457-12JC CY7C457-12NC CY7C457-14JC CY7C457-14JCT CY7C455-14JC CY7C455-14JCT

CYPRESS[Cypress Semiconductor]
Part No. CY7C457 CY7C456 CY7C455 CY7C457-30JCT CY7C457-12JC CY7C457-12NC CY7C457-14JC CY7C457-14JCT CY7C455-14JC CY7C455-14JCT
OCR Text .... The Voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. TA is the "instant on" case temperature. Document #: 38-06003 Rev. *A Page 3 of 23 CY7C455 CY7C456 CY7C457 Pin Definitions Signal Name D0 - 17 ...
Description Memory : FIFOs
512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags

File Size 368.09K  /  23 Page

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    CY7C4285V CY7C4275V CY7C4255V CY7C4265V

CYPRESS[Cypress Semiconductor]
Part No. CY7C4285V CY7C4275V CY7C4255V CY7C4265V
OCR Text ...nable Read Enable Write Clock I/O I O I I I Data inputs for an 18-bit bus. Data outputs for an 18-bit bus. Enables the WCLK input. Enables the RCLK input. The rising edge clocks data into the FIFO when WEN is LOW and the FIFO is not Full. W...
Description 32K/64Kx18 Low Voltage Deep Sync FIFOs

File Size 280.32K  /  20 Page

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