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    CDCU877B CDCU877BZQLT

Seme LAB
Part No. CDCU877B CDCU877BZQLT
OCR Text ... Low Static Phase Offset: 50 ps distributes One Differential Clock Input to Ten Differential Outputs 52-Ball BGA (MicroStarTM Junior BGA, 0,65-mm pitch) External Feedback Pins (FBIN, FBIN) are Used to Synchronize the Outputs to the Input Cl...
Description 1.8-V PHASE LOCK LOOP CLOCK DRIVER

File Size 480.95K  /  17 Page

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    CY28358 CY28358OC CY28358OCT

SpectraLinear Inc
Part No. CY28358 CY28358OC CY28358OCT
OCR Text ...Synchronous DRAM applications * distributes one clock input to six differential outputs * External feedback pin FBIN is used to synchronize the outputs to the clock input * Conforms to the DDR1 specification * Spread AwareTM for EMI reducti...
Description 200-MHz Differential Clock Buffer/Driver

File Size 131.96K  /  10 Page

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    CY28352 CY28352OC CY28352OCT CY28352OXC CY28352OXCT

Cypress Semiconductor
Part No. CY28352 CY28352OC CY28352OCT CY28352OXC CY28352OXCT
OCR Text ...synchronous DRAM applications * distributes one clock input to six differential outputs * External feedback pin FBIN is used to synchronize output to clock input * Conforms to DDRI specification * Spread AwareTM for electromagnetic interfer...
Description Differential Clock Buffer/Driver DDR400- and DDR333-Compliant

File Size 113.95K  /  8 Page

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    CY28351 CY28351OC CY28351OCT

SpectraLinear Inc
Part No. CY28351 CY28351OC CY28351OCT
OCR Text ...synchronous DRAM applications * distributes one clock input to ten differential outputs * External feedback pin (FBIN) is used to synchronize the outputs to the clock input * Conforms to the DDRI specification * Spread Aware for electromagn...
Description Differential Clock Buffer/Driver

File Size 141.83K  /  7 Page

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    Pericom Technology
PERICOM[Pericom Semiconductor Corporation]
Part No. PI6CVF857 PI6CVF857A PI6CVF857AE PI6CVF857NF PI6CVF857ZDE
OCR Text ... Registered DIMM applications * distributes one differential clock input pair to ten differential clock output pairs * Inputs (CLK,CLK) and (FBIN,FBIN) * Input PWRDWN: LVCMOS * Outputs (Yx, Yx), (FBOUT, FBOUT) * External feedback pins (FBIN...
Description 1:10 PLL Clock Driver for 2.5V DDR-SDRAM Memory

File Size 298.86K  /  14 Page

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    PERICOM[Pericom Semiconductor Corporation]
Part No. PI6CV857LA PI6CV857 PI6CV857L
OCR Text ... Data Rate SDRAM applications. distributes one differential clock input pair to ten differential clock output pairs. Inputs (CLK,CLK) and (FBIN,FBIN): SSTL_2 Input PWRDWN: LVCMOS Outputs (Yx, Yx), (FBOUT, FBOUT): SSTL_2 External feedba...
Description PLL Clock Driver for 2.5V DDR-SDRAM Memory

File Size 300.54K  /  9 Page

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    PERICOM[Pericom Semiconductor Corporation]
Part No. PI6CV855L PI6CV855
OCR Text ...SSTL_2 DDR SDRAM applications. distributes one differential clock input pair to five differential clock output pairs. Inputs (CLK,CLK) and (FBIN,FBIN): SSTL_2 Outputs (Yx, Yx), (FBOUT, FBOUT): SSTL_2 External feedback pins (FBIN,FBIN) a...
Description PLL Clock Driver for 2.5V SSTL 2 DDR SDRAM Memory

File Size 262.79K  /  9 Page

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    Pericom Technology
PERICOM[Pericom Semiconductor Corporation]
Pericom Semiconductor Corp.
Pericom Semiconductor, Corp.
Part No. PI6CU877NFE PI6CU877 PI6CU877NF
OCR Text distributes one differential clock input pair to ten differential clock output pairs. * Differential Inputs (CLK, CLK) and (FBIN, FBIN) * Input OE/OS: LVCMOS * Differential Outputs (Y[0:9], Y[0:9] and (FBOUT, FBOUT) * External feedback pins...
Description PLL Clock Driver for 1.8V DDR2 Memory PLL时钟驱动.8V的DDR2内存

File Size 316.61K  /  11 Page

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