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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
M2006-02I672.1600 M2006-02I627.3296LF
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| OCR Text |
...lar mfec divider values as the complementary selections noted. this allows the use of the same loop filter component values and resulting ...pair has its own p divider, the fout1 pair and the fout0 can output the two different frequencie... |
| Description |
PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36
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| File Size |
256.66K /
8 Page |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS527-04 ICS527R-04T ICS527R-04
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| OCR Text |
...ect to ground PECL input clock. Complementary PECL input clock. Feedback divider word input pins determined by user. Forms a binary number f...pair frequencies are greater than (or equal to) 80 MHz, connect IRANGE to VDD, or let it float. If b... |
| Description |
Clock Slicer User Configurable PECL input Zero Delay Buffer
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| File Size |
115.12K /
9 Page |
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it Online |
Download Datasheet
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